INFORMATION CHANGE THE WORLD

International Journal of Information Engineering and Electronic Business(IJIEEB)

ISSN: 2074-9023 (Print), ISSN: 2074-9031 (Online)

Published By: MECS Press

IJIEEB Vol.6, No.5, Oct. 2014

Implementation of Particle Swarm Optimization Algorithm in VHDL for Digital Circuits Optimization

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Author(s)

Garima Grover, Ila Chaudhary

Index Terms

Digital combinational circuits; VHDL, Particle Swarm Optimization; Search Space; Human methods

Abstract

In order to accomplish the targets of specified levels for reducing the hardware requirements of digital systems, innovative techniques are required to be implemented either at the device level, architectural level or gate level designs. In this paper one of the evolutionary techniques i.e. Particle Swarm Optimization Algorithm has been used to optimize digital circuits at the gate level on VHDL platform to draw an automatic, generalised and reliable technique to find optimum solutions with reduced gate count for the designing of digital systems.

Cite This Paper

Garima Grover, Ila Chaudhary,"Implementation of Particle Swarm Optimization Algorithm in VHDL for Digital Circuits Optimization", IJIEEB, vol.6, no.5, pp.16-21, 2014. DOI: 10.5815/ijieeb.2014.05.03

Reference

[1]James Kennedy, Russel Eberhart, "Particle Swarm Optimization", Neural Networks, 1995, Proceedings IEEE conference vol. 4, page(s) 1942-1948. 

[2]Gudise, V.G., Venayagamoorthy, G.K., "Evolving digital circuits using Particle Swarm", Neural Networks, 2003, Proceedings IEEE Joint Conference vol. 1, page(s) 468-472.

[3]Yuhui Shi, Russell C. Eberhart "Parameter selection in particle swarm optimization", Springer Link 1998, Evolutionary Programming VII, vol. 1447, page(s) 590-600

[4]Gudise, V.G., Venayagamoorthy, G.K., "Evolving digital circuits using Particle Swarm", Neural Networks, 2003, Proceedings IEEE Joint Conference vol. 1, page(s) 468-472.

[5]Carlos A. Coello Coello, Erika Hernandez Luna & Arturo Hernandez, "Use of Particle Swarm Optimization to design combinational logic circuits", Springer Link 2003, Embedded Systems, Vol. 2606, page(s) 398-409.

[6]Jen-Pin Yang; Electr. Eng. Dept., I-Shou Univ., Dashu, Taiwan; Chih-Kung Kung; Fang-Tsung Liu; Yu-Ju Chen, "Logic Circuit Design by Neural NeTwork and PSO Algorithm", PCSPA 2010, Proceedings IEEE Conference, page(s) 456-459.

[7]Ushie, James Ogri, Obu Joseph Abebe Etim, Iniobong prosper Department of Physics, Department of Physics, Department of Physics, University of Calabar, University of Calabar, University of Calabar, Calabar, "Optimising digital combinational circuit using particle swarm optimisation technique", Lat. Am. J. Phys. Educ. Vol. 6, No. 1, March 2012, page(s) 72-77.

[8]Feng Tian; ch. of Inf. Eng., Hebei Univ. of Technol., Tianjin, China ; Zhenbin Gao;YiCai Sun "VHDL Modeling of Particle Swarm Optimization Algorithm", CISE 2009, Proceedings IEEE conference, page(s) 1-4.

[9]Par Kurlberg, Karl Pomerance, "Period of the Linear Congruential and Power Generators", Mathematics Subject Classification, 1991.

[10]Yuhui Shi, Russell C. Eberhart "Parameter selection in particle swarm optimization", Springer Link 1998, Evolutionary Programming VII, vol. 1447, page(s) 590-600.

[11]Feng Tian; ch. of Inf. Eng., Hebei Univ. of Technol., Tianjin, China ; Zhenbin Gao; iCai Sun "VHDL Modeling of Particle Swarm Optimization Algorithm", CISE 2009, Proceedings IEEE conference, page(s) 1-4.

[12]Magnus Erik Hvass Pedersen "Good Parameters for Particle Swarm Optimization" Hvass Laboratories Technical Report no. HL1001, 2010.

[13]Jen-Pin Yang; lectr. Eng. Dept., I-Shou Univ., Dashu, Taiwan; hih-Kung Kung;Fang-Tsung Liu; u-Ju Chen, "Logic Circuit Design by Neural Network and PSO Algorithm", PCSPA 2010, Proceedings IEEE Conference, page(s) 456-459.

[14]T. Niknam and B. Amiri. An efficient hybrid approach based on PSO, ACO and k-means for cluster analysis. Applied Soft Computing, 10:183-197, 2010.