International Journal of Intelligent Systems and Applications (IJISA)
IJISA Vol. 4, No. 9, 8 Aug. 2012
Cover page and Table of Contents: PDF (size: 386KB)
Low Noise Amplifier for 2.45 GHz Frequency Band at 0.18 µm CMOS Technology for IEEE Standard 802.11 b/g WLAN
Full Text (PDF, 386KB), PP.68-74
Views: 0 Downloads: 0
Author(s)
Index Terms
Advanced design system, Low noise amplifier, Input and output matching, RFIC, VLSI
Abstract
This paper presents the design of low noise amplifier (LNA) at 2.45 GHz and integrated at 0.18 µm RF CMOS process technology. This type of LNA at 2.45 GHz is use in the Bluetooth receiver. The proposed method is useful to optimize noise performance and power gain while maintaining good input and output matching. The amplifier is designed to be used as first stage of a receiver for wireless communication. The main aim of designer is to achieve low noise figure with improved gain with the help of CMOS technology by using single stage n-MOS amplifier. The simulation results show a forward gain of 14.0 dB, a noise-figure of 0.5 dB and stability factor is approximate unity, in which the circuit operates at 14.2 mA drain current with supply voltage of 3.5 V and biasing voltage of 1.5 V.
Cite This Paper
Viranjay M. Srivastava, Ravinder Kumar, "Low Noise Amplifier for 2.45 GHz Frequency Band at 0.18 μm CMOS Technology for IEEE Standard 802.11 b/g WLAN", International Journal of Intelligent Systems and Applications(IJISA), vol.4, no.9, pp.68-74, 2012. DOI:10.5815/ijisa.2012.09.09
Reference
[1]Yu Lin Wei and Jun De Jin, “A low power low noise amplifier for K-band applications,” IEEE Microwave and Wireless Components Letters, vol. 19, no. 2, pp. 116-118, Feb. 2009.
[2]A. Meaamar, Boon Chirn Chye, Man Anh, and Yeo Kiat Seng, “A 3 to 8 GHz low noise CMOS amplifier,” IEEE Microwave and Wireless Components Letters, vol. 19, no. 4, pp. 245-247, April 2009.
[3]Roee Ben Yishay, Sara Stolyarova, Shye Shapira, Moshe Musiya, David Kryger, Yossi Shiloh, and Yael Nemirovsky, “A CMOS low noise amplifier with integrated front-side micro-machined inductor,” Microelectronics Journal, vol. 42, no. 5, pp. 754-757, May 2011.
[4]Ravinder Kumar, Munish Kumar, and Viranjay M. Srivastava, “Design and noise optimization for a RF low noise amplifier,” Int. J. of VLSI Design and Communication Systems, vol. 3, no. 2, pp. 165-173, April 2012.
[5]Nazif Emran Farid, Arjuna Marzuki, and Ahmad Ismat,“A variable gain 2.5 GHz CMOS low noise amplifier for mobile wireless communications,” Proc. of 9th IEEE Int. Conf. of communications, Malaysia, 15-17 Dec. 2009, pp. 885-889.
[6]Wei Guo and Daquan Huang, “The noise and linearity optimization for 1.9 GHz CMOS low Noise Amplifier,” Proc. of IEEE Asia Pacific Conf. on ASIC, Taiwan, 6 - 8 Aug. 2002, pp. 253-257.
[7]Jose Carlos Pedro and Nuno Borges Carvalho, Intermodulation distortion in microwave and wireless circuits, Artech Publication House, 1st Ed., 2003.
[8]Bo Huang, Chi Hsueh Wang, Chung Chun Chen, Ming Fong Lei, Pin Cheng Huang, Kun You Lin, and Huei Wang , “Design and analysis for a 60 GHz low noise amplifier with RF ESD protection,” IEEE Trans. on Microwave Theory and Techniques, vol. 57, no. 2, pp. 298-305, Feb. 2009.
[9]Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Analysis of drain current and switching speed for SPDT switch and DPDT switch with proposed DP4T RF CMOS switch,” J. of Circuits, Systems and Computers, vol. 21, no. 4, pp. 1-18, June 2012.
[10]Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF switch,” Microelectronics Journal, vol. 42, no. 3, pp. 527-534, March 2011.
[11]Norlaili, Tun Zainal and Azni Zulkifli, “A 1.4 dB noise figure CMOS LNA for WCDMA application,” Proc. of IEEE RF and Microwave Conf., Malaysia, 12-14 Sept. 2006, pp. 143-148.
[12]Wenjian Chen, Tino Copani, Hugh J. Barnaby, Sayfe Kiaei, “A 0.13 µm CMOS ultra-low power front-end receiver for wireless sensor networks,” Proc. of IEEE Radio Frequency Integrated Circuits Symposium, Honolulu, 3-5 June 2007, pp. 105-108.
[13]S. F. Wan Muhamad Hatta, N. Soin, “Performance of the forward-biased RF LNA with deep n-well n-MOS transistor,” Proc. of IEEE Int. Conf. on Semiconductor Electronics, Malaysia, 25-17 Nov. 2008, pp. 466-469.
[14]Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Design and performance analysis of cylindrical surrounding double-gate MOSFET for RF switch,” Microelectronics Journal, vol. 42, no. 10, pp. 1124-1135, Oct. 2011.
[15]Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Analysis of double gate CMOS for double-pole four-throw RF switch design at 45-nm technology,” J. of Computational Electronics, vol. 10, no. 1-2, pp. 229-240, June 2011.
[16]Massimo Brandolini, Paolo Rossi, Danilo Manstretta and Francesco Svelto, “Toward multi-standard mobile terminals-fully integrated receivers requirements and architectures,” IEEE Trans. on Microwave Theory and Techniques, 2005, pp. 1026-1038.
[17]Thomas H. Lee, The design of CMOS radio-frequency integrated circuits, Cambridge Univ. Press, 2nd Ed., 2004.
[18]Man Long Her, Hao Chih Hsu, Hsin Hung Lin, Tseng Hsow Yuan and Shun Ping Chan, “Design and implementation of LNA for 2 to 6 GHz WIMax system,” Proc. of 15th IEEE Asia Pacific Conf. on Communications, China, 8-10 Oct. 2009, pp. 426-429.
[19]Hosein Alavi Rad, Goodarz Cheraghi and Soheil Ziabakhsh, “A low power CMOS LNA for 2.45 GHz band IEEE 802.15.4 standard in 0.18µm technology,” Proc. of 5th IEEE European Conf. on Circuits and Systems for Communications, Serbia, 23-25 Nov. 2010, pp. 78-81.
[20]Hsieh Hung Hsieh, “A 40 GHz low noise amplifier with a positive-feedback network in 0.18 μm CMOS,” IEEE Trans. on Microwave Theory and Techniques, vol. 57, no. 8, pp. 1895-1902, Aug. 2009.
[21]Kiat Seng Yeo, Manh Anh Do, and Chirn Chye Boon, Design of CMOS RF integrated circuits and systems, World Scientific Publications, 1st Ed., 2010.
[22]Y. S. Wang and L. H. Lu, “5.7 GHz low power variable gain LNA in 0.18 µm CMOS,” Electronics Letters, vol. 41, no. 2, pp. 66-68, Jan. 2005.
[23]Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Capacitive model and S-parameters of double-pole four-throw double-gate RF CMOS switch,” Int. J. of Wireless Engineering and Technology, vol. 2, no. 1, pp. 15-22, Jan. 2011.
[24]Mu Chun Wang, Hsin Chia Yang, and Yi Jhen Li, “Minimization of cascade low noise amplifier with 0.18 μm CMOS process for 2.4 GHz RFID applications,” Electronics and Signal Processing, Lecture Notes in Electrical Engineering, vol. 97, pp. 571-578, 2011.
[25]Lawrence Harte, Introduction to bluetooth, Althos Publications, 2nd Ed., 2009.
[26]Chang Hsi Wu and Yu Po Lin, “A low power CMOS low noise amplifier for UWB applications,” Proc. of IEEE Int. Conf. on Ultra Wideband, China, 20-23 Sept. 2010, pp. 1328-1331.