Work place: Department of Computer Science and Technology, West Pomeranian University of Technology, Szczecin, Poland
E-mail: gtariova@wi.zut.edu.pl
Website: https://www.researchgate.net/profile/Galina-Cariowa
Research Interests: Mathematics of Computing, Data Structures and Algorithms, Computational Mathematics, Graph and Image Processing, Signal Processing, Computer systems and computational processes, Image Processing
Biography
Galina Cariowa received the M.Sc. degree in mathematics from Moldavian State University, Chişinãu, in 1978, and the Ph.D. degree in computer science from the West Pomeranian University of Technology, Szczecin, Poland, in 2007. She is currently an Assistant Professor with the Department of Computer Architectures and Teleinformatics, West Pomeranian University of Technology. Her scientific interests include numerical linear algebra and digital signal processing algorithms, VLSI architectures, and data processing parallelization.
By Aleksandr Cariow Galina Cariowa
DOI: https://doi.org/10.5815/ijigsp.2014.10.01, Pub. Date: 8 Sep. 2014
In this paper two different approaches to the rationalization of FDWT and IDWT basic operations execution with the reduced number of multiplications are considered. With regard to the well-known approaches, the direct implementation of the above operations requires 2L multiplications for the execution of FDWT and IDWT basic operation plus 2(L-1) additions for FDWT basic operation and L additions for IDWT basic operation. At the same time, the first approach allows the design of the computation procedures, which take only 1,5L multiplications plus 3,5L+1 additions for FDWT basic operation and L+1 multiplications plus 3,5L additions for IDWT basic operation. The other approach allows the design of such computation procedures, which require 1,5L multiplications, plus 2L-1 addition for FDWT basic operation and L+1 addition for IDWT basic operation.
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