A communication system requires a highly stabilized frequency; LC and RC oscillator are two wide option for frequency generation. Performance of an LC oscillator suffers from leakage, area, noise etc compare RC oscillator. Voltage controlled oscillator (VCO) is preferred category if RC oscillator to generate high oscillator frequency. VCO contains odd number of delay stage cascaded together; output frequency strongly depends on switching threshold of individual stages. A 3 stage current starved VCO can generate upto 0.6 Ghz; this work is focused around body bias technique to increase frequency without increasing number of delay stage. Oscillation frequency has been controlled by bulk terminal of PMOS and NMOS individually and by means of adaptive body bias network. Cadence spectre based simulation result at CMOS 90nm shows that by reverse biasing of PMOS obtained frequency is 1.2GHz-10.01GHz with tuning range of 95% while biasing of NMOS generate frequency of 500MHz- 12.5GHz with tuning range capability of 96%. This design presents high frequency with wider tuning range and optimum reduced power by which this oscillator design can be used in different band of communication.