Tahere daemi

Work place: Faculty member of azad university of yazd, Iran

E-mail: T_daemi@yahoo.com

Website:

Research Interests: Computational Engineering, Engineering

Biography

T. Daemi was born in Iran, in 1979. She received the B.Sc degree from Yazd University, Yazd, Iran, in 2002, M.Sc degree from Shiraz University, Shiraz, Iran in 2005, and Ph.D degree from Isfahan University of Technology, Isfahan, Iran in 2012. Currently, she is assistant professor at Islamic Azad University of Yazd, Yazd, Iran. Her research interest is reliability and security analysis of power systems, with application of data mining and Bayesian Networks in power systems.

Author Articles
Optimal Placement and Sizing of Capacitor and Power-Electronic Interfaced Distributed Generation in Heavy Harmonic Polluted Systems

By Mohamadreza Heydari Sharafdarkolai Hamed Dehghan Niyazi Tahere daemi Ali Akbar Kasiri

DOI: https://doi.org/10.5815/ijisa.2014.07.07, Pub. Date: 8 Jun. 2014

Presence of distributed generation (DG) in distribution systems has significant impacts on the operational characteristics of these systems, also using capacitor for reactive compensation and loss reduction is so common. Injected harmonic currents from non-linear loads into distribution system distort all of voltages and currents and must be considered when placing the capacitor banks so that the resonance will not occur. Distributed Generation is often connected to the network via power-electronic interfaces for a proper coupling with the distribution networks. Inverters are capable of producing harmonic components and can be used as ancillary services for reducing harmonics by designing of a proper controlling system. In this paper discrete particle swarm optimization (DPSO) approach is used for the optimal placement and sizing of distributed generations and capacitors in distorted distribution systems for simultaneous voltage profile improvement, loss and total harmonic distortion (THD) reduction. Constraints include voltage limit, voltage THD, number/ size of capacitors and generators. For evaluating the proposed algorithm, the IEEE 33-bus test system is modified and employed.

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