Contour representation of binary object is increasingly used in image processing and pattern recognition. Chain code and crack code are popular methods of contour encoding. However, by using these methods, an accurate estimate of geometric features like area and perimeter of objects are difficult to obtain. Mid-crack code, another contour encoding method, can help to obtain more accurate estimate of the geometric features of objects. Though a considerable amount of reduction of the size of images is obtained by fixed-length mid-crack code, yet, more efficient encoding is possible by considering and applying variable-length encoding technique. In this paper, a compressed mid-crack code is proposed based on the Huffman code. Experiments performed on different images yield that the proposed representation reduces the number of bits require to encode the contour of an image with compared to the classical mid-crack code.

Time delays in system states or control may result into unacceptable system operation or uncertainty in specialised technical systems like aircraft control, plant control, robotics etc. The issue of robustness, controllability, traceability, flexible management, reliability, and safety of such systems with time-delays, has been one of the primary research focuses of the last few decades. In parallel computing, different computing subunits share their tasks to balance loads to increase performance and throughput. In order to do so, subsystems have to communicate among themselves, adding further delay on top of existing system delay. It is possible to maintain performance and stability of the whole system, by designing observer for every subsystem in the system, overseeing the system state and compensating for existing time-delay. This paper reviews present literature to identify a linear time-delay system for load balancing and evaluates the stability and load balancing performance of the system with and without an observer. Stability is analysed in terms of oscillation in the system responses and performance is evaluated as the speed of load-balancing operation.

In this paper, a hardware system for Sobel Edge Detection Algorithm is designed and simulated for a 128 pixel, 8-bit monochrome line-scan camera. The system is designed to detect objects as they move along a conveyor belt in a manufacturing environment, the camera will observe dark objects on a light conveyor belt. The edge detector is required to detect horizontal and vertical edges using Sobel edge detection method. The Sobel operator requires 3 lines and takes 3 pixels per line, thus using a 3×3 input block to process each pixel. The centre pixel of the 3×3 pixel block can be classified as an edge point or otherwise by thresholding the value from the operator. The FPGA based Sobel edge detector is designed and simulated using Altera Quartus II 8.1 web edition by targeting Cyclone II development boards.