Work place: Dept. of EEE, Birla Institute of Technology, Mesra, Ranchi-835215, India
E-mail: shivaneshsekar@gmail.com
Website:
Research Interests: Analysis of Algorithms, Mathematics of Computing, Theory of Computation, Models of Computation
Biography
G. Shivanesh is a FPGA R&D engineer at Logic Fruit Technology who is currently working on PCIe IP implementations. He did his Bachelors of technology from Birla Institute of Technology Mesra Ranchi in the field of Electrical and Electronics. His interest lies in the field of FPGA, Power Electronics, and Internet of things.
By Sushma S. Kamlu G. Shivanesh Amlan Gain
DOI: https://doi.org/10.5815/ijitcs.2023.02.02, Pub. Date: 8 Apr. 2023
This paper refers to work evaluating the performance of PI controllers integrated with optimization techniques designed for Single Ended Primary Inductance Converters (SEPIC). With the SEPIC converter, a constant voltage output can be retained while switching a range of dc voltages. Performance of PI controller has been combined with Artificial Bee Colony (ABC) Algorithm, Particle swarm optimization (PSO) Algorithm, Whale optimization algorithm (WOA). In this research, a performance analysis of the SEPIC dc-dc converter controller constructed with the aforementioned optimization strategies is carried out. Statistics proves WOA provides best stability exhibited with fast response when compared to other optimization techniques.
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