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International Journal of Modern Education and Computer Science (IJMECS)

ISSN: 2075-0161 (Print), ISSN: 2075-017X (Online)

Published By: MECS Press

IJMECS Vol.6, No.11, Nov. 2014

Designing a Novel Ternary Multiplier Using CNTFET

Full Text (PDF, 426KB), PP.45-51


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Author(s)

Nooshin Azimi, Hamidreza Hoseini, Abbas Shahsavari

Index Terms

CNTFET;Multi-valued logic (MVL);Multiplier;ternary logic;carbon nanotube

Abstract

Today, multipliers are included as substantial keys of many systems with high efficiency such as FIR filters, microprocessors and processors of digital signals. The efficiency of the systems are mainly evaluated by their multipliers capability since multipliers are generally the slowest components of a system while occupying the most space.
Multiple Valued Logic reduces the number of the required operations to implement a function and decreases the chip surface. Carbon Nanotube Field Effect Transistors (CNTFET) are considered as good substitutes for Silicon Transistors (MOSFET). Combining the abilities of Carbon Nanotubes Transistors with the advantages of Multiple Valued can provide a unique design which has a higher speed and less complexity.
In this paper, a new multiplier is presented by nanotechnology using a ternary logic that improves the consuming power, raises the speed and decreased the chip surface as well.
The presented design is simulated using CNTFET of Stanford University and HSPICE software, and the results are compared with other instances.

Cite This Paper

Nooshin Azimi, Hamidreza Hoseini, Abbas Shahsavari,"Designing a Novel Ternary Multiplier Using CNTFET", IJMECS, vol.6, no.11, pp.45-51, 2014.DOI: 10.5815/ijmecs.2014.11.06

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