International Journal of Modern Education and Computer Science (IJMECS)
IJMECS Vol. 8, No. 3, 8 Mar. 2016
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A Low Cost High Speed FPGA-Based Image Processing Framework
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Author(s)
Index Terms
FPGA, MATLAB, Hardware Implementation, UDP Stack, Digital Signal Processing, Image Processing
Abstract
In this paper, a high-speed and low-cost image processing framework based on MATLAB-FPGA interface is proposed that can be used in researches aiming at developing wide variety of not only image processing tasks but also many signal processing applications. In addition, this new framework could be exploited for several other tasks such as on-chip verification, using PC as an enormous external RAM for FPGA while preserving high speed data access, developing hardware-software co-designs, etc. The communication between FPGA and MATLAB is via 1Gbs Ethernet based on UDP/IP protocol which is very promising for high speed data transmission in point-to-point communications. UDP stack is efficiently designed in FPGA based on a fully pipelined architecture with minimum level of logic in order to reach high performance.. Dynamic data transmission between the UDP stack, memory and an arbitrary image processing module makes it possible to practically simulate, debug and implement most relevant applications. The hardware system is relatively low-cost and it consumes a negligible area of a Spartan-6 LXT45 Xilinx FPGA. Operating at 1 Gb/s, theoretically, the system is capable of processing 132 frames of 640*480 color images in a second. The effectiveness of the system is evaluated by means of both place and route simulation and practical implementation of a skin detection algorithm and a motion detector.
Cite This Paper
Mohammad Reza Mahmoodi, Sayed Masoud Sayedi, "A Low Cost High Speed FPGA-Based Image Processing Framework", International Journal of Modern Education and Computer Science(IJMECS), Vol.8, No.3, pp.11-21, 2016. DOI:10.5815/ijmecs.2016.03.02
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