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International Journal of Modern Education and Computer Science (IJMECS)

ISSN: 2075-0161 (Print), ISSN: 2075-017X (Online)

Published By: MECS Press

IJMECS Vol.8, No.6, Jun. 2016

Novel Reversible DS Gate for Reversible Logic Synthesis

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Author(s)

Shaveta Thakral, Dipali Bansal

Index Terms

Reversible;Power consumption;Primitive component;Optimization metrics; Reversible DS gate

Abstract

Reversible logic has various applications in fields of computer graphics, optical information processing, quantum computing, DNA computing, ultra low power CMOS design and communication. As our day to day life is demanding more and more portable electronic devices, challenging focus on technology is demanding great system performance without any compromise in power consumption. It is obvious to find tradeoff between processing power and heat generation. As decreased processing speed leads to reduced power consumption but obviously compromise in performance is not acceptable for sophisticated applications. Thus power consumption is a prime target now days. Needless to say, researchers will now look at reversible logic in this vein. Primitive component of reversible logic synthesis are reversible logic gates .Thus it is very important for a new researcher to look into extensive literature survey of reversible logic gates. Many papers have been reported with review of reversible logic gates. This paper aims on updates in reversible logic gates and propose a novel reversible DS gate which will be stepping stone in design and synthesis of any complex reversible logic based synthesis. 

Cite This Paper

Shaveta Thakral, Dipali Bansal,"Novel Reversible DS Gate for Reversible Logic Synthesis", International Journal of Modern Education and Computer Science(IJMECS), Vol.8, No.6, pp.20-26, 2016.DOI: 10.5815/ijmecs.2016.06.03

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