International Journal of Modern Education and Computer Science (IJMECS)
IJMECS Vol. 8, No. 6, 8 Jun. 2016
Cover page and Table of Contents: PDF (size: 525KB)
Novel Reversible DS Gate for Reversible Logic Synthesis
Full Text (PDF, 525KB), PP.20-26
Views: 0 Downloads: 0
Author(s)
Shaveta Thakral
1,*
Dipali Bansal
1
Index Terms
Reversible, Power consumption, Primitive component, Optimization metrics, Reversible DS gate
Abstract
Reversible logic has various applications in fields of computer graphics, optical information processing, quantum computing, DNA computing, ultra low power CMOS design and communication. As our day to day life is demanding more and more portable electronic devices, challenging focus on technology is demanding great system performance without any compromise in power consumption. It is obvious to find tradeoff between processing power and heat generation. As decreased processing speed leads to reduced power consumption but obviously compromise in performance is not acceptable for sophisticated applications. Thus power consumption is a prime target now days. Needless to say, researchers will now look at reversible logic in this vein. Primitive component of reversible logic synthesis are reversible logic gates .Thus it is very important for a new researcher to look into extensive literature survey of reversible logic gates. Many papers have been reported with review of reversible logic gates. This paper aims on updates in reversible logic gates and propose a novel reversible DS gate which will be stepping stone in design and synthesis of any complex reversible logic based synthesis.
Cite This Paper
Shaveta Thakral, Dipali Bansal, "Novel Reversible DS Gate for Reversible Logic Synthesis", International Journal of Modern Education and Computer Science(IJMECS), Vol.8, No.6, pp.20-26, 2016. DOI:10.5815/ijmecs.2016.06.03
Reference
[1]R. Landauer, "Irreversibility and Heat Generation in the Computational Process," IBM Journal of Research and Development, vol. 5, pp. 183-91, 1961.
[2]C. Bennett, "Logical Reversibility of Computation," IBM Journal of Research and Development, vol. 17, pp. 525-532,1973.
[3]Toffoli, Tommaso,” Reversible computing”. Springer Berlin Heidelberg, 1980
[4]E. Fredkin and T. Toffoli, "Conservative Logic," International Journal of Theoretical Physics, vol. 21, pp. 219-53, 1980.
[5]A. Peres, "Reversible Logic and Quantum Computers," Physical Review, vol. 32, iss. 6, 1985, pp 3266-3276
[6]Parhami, Behrooz. "Fault-tolerant reversible circuits." Signals, Systems and Computers, 2006. ACSSC'06. Fortieth Asilomar Conference on. IEEE, 2006.
[7]Thapliyal, Himanshu, and A. Prasad Vinod. "Design of reversible sequential elements with feasibility of transistor implementation." Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on. IEEE, 2007.
[8]Moallem, Payman, et al. "Optimized reversible arithmetic logic units." Journal of Electronics (China) 31.5,pp. 394-405,2014.
[9]F. Sharmin, R. K. Mitra, R. Hasan, and A. Rahman, "Low cost reversible signed comparator," International Journal, 2013.
[10]Morrison, Matthew, Matthew Lewandowski, and Nagarajan Ranganathan. "Design of a tree-based comparator and memory unit based on a novel reversible logic structure." VLSI (ISVLSI), 2012 IEEE Computer Society Annual Symposium on. IEEE, 2012.
[11]Thapliyal, Himanshu, and Nagarajan Ranganathan. "Design of efficient reversible binary subtractors based on a new reversible gate." VLSI, 2009. ISVLSI'09. IEEE Computer Society Annual Symposium on. IEEE, 2009.
[12]Nagamani, A. N., H. V. Jayashree, and H. R. Bhagyalakshmi. "Novel low power comparator design using reversible logic gates." Indian J. Comput. Sci. Eng 2.4 pp. 566-574.,2011.
[13]Moraga, Claudio, and Fatima Z. Hadjam. "On double gates for reversible computing circuits." Proc. Intl. Workshop on Boolean Problems. 2012.
[14]Haghparast, Majid, et al. "Design of a novel reversible multiplier circuit using HNG gate in nanotechnology." World Appl. Sci. J. 2008.
[15]Morrison, Matthew, and Nagarajan Ranganathan. "Design of a reversible ALU based on novel programmable reversible logic gate structures." VLSI (ISVLSI), 2011 IEEE Computer Society Annual Symposium on. IEEE, 2011.