International Journal of Modern Education and Computer Science (IJMECS)
IJMECS Vol. 8, No. 9, 8 Sep. 2016
Cover page and Table of Contents: PDF (size: 575KB)
A Novel Radiation Hardened Parallel IO Port for Highly Reliable Digital IC Design
Full Text (PDF, 575KB), PP.20-27
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Author(s)
Nastaran Rajaei
1,*
Ramin Rajaei
2
Index Terms
Parallel IO port, Single Event Upset (SEU), Single Event Transient (SET), Triple Modular Redundancy (TMR)
Abstract
This article proposes a radiation hardened parallel IO port capable of tolerating radiation induced soft errors including single event upsets (SEUs) as well as single event transients (SETs). To investigate the soft error tolerance capability of the proposed design, we simulated it using the Cadence tool and showed its offered advantages. Comparing with the conventional and well-known TMR IO port, the proposed architecture results in less hardware redundancy and design cost. Through an analytical analysis, we also showed that, our design has lower failure probability than the TMR approach. It also is notable that, among the considered previous counterparts, our proposed design is the only one that is capable of tolerating both the SEUs and SETs.
Cite This Paper
Nastaran Rajaei, Ramin Rajaei, "A Novel Radiation Hardened Parallel IO Port for Highly Reliable Digital IC Design", International Journal of Modern Education and Computer Science(IJMECS), Vol.8, No.9, pp.20-27, 2016. DOI:10.5815/ijmecs.2016.09.03
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