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S. S. Thakur

Work place: Dept. of Electronics & Communication Engg. Jabalpur Engineering College, Jabalpur, India

E-mail: dr.bhavana.jharia@jec-jabalpur.org

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Biography

S. S. Thakur is presently working as a professor in Department of Applied Mathematics and Coordinator Advanced Computing Centre of Fuzzy Technology, Jabalpur Engineering College, Jabalpur, (M. P.), INDIA. Dr. Thakur received M. Sc. and Ph. D. Degrees in mathematics from Dr. Hari Singh Gour University, Sagar in 1977 and 1982 respectively. He has published more than 160 research papers and supervised sixteen Ph. D. students most in the area of Topology and Fuzzy Topology and Fuzzy Data bases. He has been the organizing secretary of an International conference on “Soft Computing and Intelligent Systems” held in Dec. 2007. He is a member of editorial board and serves as referee of many international Journals. The main foci of his current work includes Intuitionist Fuzzy Topology and applications of Intuitionist Fuzzy Sets in Databases.

Author Articles
FPGA Based Pipelined Parallel Architecture for Fuzzy Logic Controller

By Vinod Kapse Bhavana Jharia S. S. Thakur

DOI: https://doi.org/10.5815/ijmecs.2012.07.04, Pub. Date: 8 Jul. 2012

This paper presents a high-speed VLSI fuzzy inference processor for the real-time applications using trapezoid-shaped membership functions. Analysis shows that the matching degree between two trapezoid-shaped membership functions can be obtained without traversing all the elements in the universal disclosure set of all possible conditions. A FPGA based pipelined parallel VLSI architecture has been proposed to take advantage of this basic idea, implemented on CycloneII-EP2C70F896C8. The controller is capable of processing fuzzified input. 
The proposed controller is designed for 2-input 1-output with maximum clock rate is 12.96 MHz and 275.33 MHz for 16 and 8 rules respectively. Thus, the inference speed is 0.81 and 34.41 MFLIPS for 16 and 8 rules, respectively.

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