Work place: Key Lab of Integrated Microsystem Science & Engineering Applications, Peking University Shenzhen Graduate School, Shenzhen 518055, China
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Research Interests: Computer Architecture and Organization, Process Control System, Data Structures and Algorithms, Analysis of Algorithms
Biography
Zheng Xie received the B.S. degree in electrical engineering from Kunming University of Science and Technology, Kunming, China, in 2008. He is currently a Ph.D student with the Key Lab of Integrated Microsystem Science & Engineering Applications, Peking University Shenzhen Graduate School, Shenzhen, where he has lead the Operator EDA Tool Research Group and Operator Verification Methodology Research Group, since 2010. His current research interests include EDA tool and verification of high-level synthesis, and system-level verification methodologies.
By Ziyi Hu Teng Wang Kuilin Chen Zheng Xie Xin.an Wang
DOI: https://doi.org/10.5815/ijieeb.2010.01.08, Pub. Date: 8 Nov. 2010
Currently ASIC applications, such as multimedia processing, require shorter time-to-market and lower cost of Non Recurring Engineering (NRE). Also, with the IC manufacturing technology developing continually, from transistor level to logic gate level, the size of design cells in digital circuits is increasing correspondingly. New design methodology is in urgent need to meet the requirement for the developing processing technology and shorter time-to-market in IC industry. This paper proposed the concepts and principles of operator design methodology, then focused on the entropy coding application based on the operators and finally presented the implementation results. The results show that with the proposed methodology, a comparable hardware performance can be obtained against the traditional standard cell based design flow. Furthermore, the design speed can be improved efficiently.
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