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Neeta Pandey

Work place: Dept. of Electronics and Communication Engg, Delhi Technological University, Bawana Road, Delhi, 110042, India

E-mail: n66pandey@rediffmail.com

Website:

Research Interests: Engineering, Computational Engineering, Computational Science and Engineering

Biography

Neeta Pandey did her M. E. in Microelectronics from Birla Institute of Technology and Sciences, Pilani and Ph. D. from Guru Gobind Singh Indraprastha University Delhi. She has served in Central Electronics Engineering Research Institute, Pilani, Indian Institute of Technology, Delhi, Priyadarshini College of Computer Science, Noida and Bharati Vidyapeeth‘s College of Engineering, Delhi in Various capacities. At present, she is Assistant Professor in ECE department, Delhi Technological University. A life member of ISTE, and member of IEEE, USA, she has published papers in International, National Journals of repute and conferences. Her research interests are in Analog and Digital VLSI Design

Author Articles
Design and Implementation of Novel Multiplier using Barrel Shifters

By Neeta Pandey Saurabh Gupta

DOI: https://doi.org/10.5815/ijigsp.2015.08.03, Pub. Date: 8 Jul. 2015

The paper presents a design scheme to provide a faster implementation of multiplication of two signed or unsigned numbers. The proposed scheme uses modified booth's algorithm in conjunction with barrel shifters. It provides a uniform architecture which makes upgrading to a bigger multiplier much easier than other schemes. The verification of the proposed scheme is illustrated through implementation of 16x16 multiplier using ISIM simulator of Xilinx Design Suite ISE 14.2. The scheme is also mapped onto hardware using Xilinx Zynq 702 System on Chip. The performance is compared with existing schemes and it is found that the proposed scheme outperform in terms of delay.

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